Toshiba used the COOL Chips VIII event, in Yokohama Japan, to demonstrate the Cell microprocessor in action, for the very first time.
The demonstration tried to highlight the capacity of the new processor for the simultaneous processing of information and featured 48 MPEG-2 streams, stored on a hard drive, that were read, decoded and projected to a 1080i resolution display divided into 8 x 6 cells; each displaying a different video. The demonstration was a showcase for Toshiba's moving video thumbnails.
The Cell architecture's official first showing involved a configuration of 9 independent cores: one PowerPC Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). The PPE and SPEs are different, but all eight SPEs are alike. In the demonstration six, of the eight synergistic processor elements, were used for decoding 48 MPEG-2 streams and one was used for scaling the screen. A testament to the architecture's efficiency is the fact that although this function was being performed, 2 SPEs were idle and available to perform any additional processing function.
